interrupt controller - перевод на Английский
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  3. interrupt controller

interrupt controller - перевод на Английский

DEVICE THAT IS USED TO COMBINE SEVERAL SOURCES OF INTERRUPT ONTO ONE OR MORE CPU LINES, WHILE ALLOWING PRIORITY LEVELS TO BE ASSIGNED TO ITS INTERRUPT OUTPUTS
Interrupt controller; Interrupt request register; Interrupt mask register; In-Service register; Interrupt Mask Register; Interrupt Request Register; In-Service Register; Embedded Programmable Interrupt Controller; PICs; Programmable Interrupt Controller; Computer Interrupt Equipment; Computer interrupt equipment; Interrupt service register
Найдено результатов: 226
interrupt controller         

общая лексика

IC

контроллер прерываний

микросхема (i8259A, i82489), устанавливаемая на системной плате для управления аппаратными прерываниями (их разрешение/запрещение, маскирование, установка приоритета и т.д.)

Смотрите также

controller; hardware interrupt; ICU; IMR; interrupt line; interrupt priority; IRQ

maskable interrupt         
  • thumb
  • Interrupt sources and processor handling
SIGNAL TO THE PROCESSOR EMITTED BY HARDWARE OR SOFTWARE INDICATING AN EVENT THAT NEEDS IMMEDIATE ATTENTION
Hardware interrupt; Interrupts; Software interrupt; Software Interrupt; Spurious Interrupt; Interrupt mask; Maskable interrupt; Masked interrupt; Level triggered interrupt; Edge triggered interrupt; Maskable interrupts; Interupt; Spurious interrupt; Trap (computing); Fault (computing); Interrupt line; Maskable Interrupt; Kernel trap; Interrupted; Interrupting; Interrupt handling; OS Trap; Shared interrupt; Interrupt (computing); IRQ affinity; Receive packet steering; Receive flow steering; Interrupt mechanism; Computer interrupt; Computer Interrupt

общая лексика

маскируемое прерывание

аппаратное прерывание (hardware interrupt), которое можно запретить (или разрешить) с помощью установки в специальном регистре процессора или контроллера прерываний (interrupt controller) маски прерываний для выполнения процессором более важной работы

антоним

nonmaskable interrupt

interrupt handler         
COMPUTING FUNCTION TRIGGERED BY AN INTERRUPT
Interrupt service routine; Interrupt routines; Interrupt Handler; Interrupt Service Routine; FLIH; SLIH

общая лексика

IH

обработчик прерываний, подпрограмма обработки прерываний

процедура, получающая управление при возникновении прерывания конкретного типа. Обычно адреса обработчиков прерываний записаны в таблице векторов прерываний

синоним

ISR

Смотрите также

cumulative throughflow; fractional throughflow

disk controller         
CONTROLLER FOR DISK STORAGE, USUALLY INTEGRATED INTO THE DRIVE
Hard disk controller; Hard drive controller; HD controller; Drive controller

общая лексика

дисковый контроллер, контроллер диска

плата расширения и/или микросхема, обеспечивающая взаимодействие процессора с дисковым накопителем

PID controller         
  • Showing the evolution of analog control loop signaling from the pneumatic to the electronic eras
  • Response of PV to step change of SP vs time, for three values of ''K''<sub>d</sub> (''K''<sub>p</sub> and ''K''<sub>i</sub> held constant)
  • Response of PV to step change of SP vs time, for three values of ''K''<sub>i</sub> (''K''<sub>p</sub> and ''K''<sub>d</sub> held constant)
  • Proportional control using nozzle and flapper high gain amplifier and negative feedback
  • Effects of varying PID parameters (K<sub>p</sub>,K<sub>i</sub>,K<sub>d</sub>) on the step response of a system
  • A [[block diagram]] of a PID controller in a feedback loop. ''r''(''t'') is the desired process value or setpoint (SP), and ''y''(''t'') is the measured process value (PV).
  • PID with derivative filtering
  • PID without derivative filtering
  • Response of PV to step change of SP vs time, for three values of ''K''<sub>p</sub> (''K''<sub>i</sub> and ''K''<sub>d</sub> held constant)
  • Basic block of a PI controller
  • alt=
  • Early PID theory was developed by observing the actions of [[helmsmen]] in keeping a vessel on course in the face of varying influences such as wind and sea state.
  • Current loops used for sensing and control signals. A modern electronic "smart" valve positioner is shown, which will incorporate its own PID controller.
CONTROL LOOP MECHANISM USED IN CONTROL ENGINEERING
PID loop; Proportional-Integral-Derivative controller; PID tuning; PID algorithm; Proportional integral derivative; PI controller; PD controller; PID control; PI Controller; Pi controller; Pidc; PID Controller; Proportional–integral–derivative controller; P.I.D. control; Droop (control); Proportional-integral-derivative controller; PID feed back controller; PID feedback controller; Three term controller; Steady-state error
ПИД-регулятор, пропорционально-интегральный (изодромный) регулятор с предварением
three term controller         
  • Showing the evolution of analog control loop signaling from the pneumatic to the electronic eras
  • Response of PV to step change of SP vs time, for three values of ''K''<sub>d</sub> (''K''<sub>p</sub> and ''K''<sub>i</sub> held constant)
  • Response of PV to step change of SP vs time, for three values of ''K''<sub>i</sub> (''K''<sub>p</sub> and ''K''<sub>d</sub> held constant)
  • Proportional control using nozzle and flapper high gain amplifier and negative feedback
  • Effects of varying PID parameters (K<sub>p</sub>,K<sub>i</sub>,K<sub>d</sub>) on the step response of a system
  • A [[block diagram]] of a PID controller in a feedback loop. ''r''(''t'') is the desired process value or setpoint (SP), and ''y''(''t'') is the measured process value (PV).
  • PID with derivative filtering
  • PID without derivative filtering
  • Response of PV to step change of SP vs time, for three values of ''K''<sub>p</sub> (''K''<sub>i</sub> and ''K''<sub>d</sub> held constant)
  • Basic block of a PI controller
  • alt=
  • Early PID theory was developed by observing the actions of [[helmsmen]] in keeping a vessel on course in the face of varying influences such as wind and sea state.
  • Current loops used for sensing and control signals. A modern electronic "smart" valve positioner is shown, which will incorporate its own PID controller.
CONTROL LOOP MECHANISM USED IN CONTROL ENGINEERING
PID loop; Proportional-Integral-Derivative controller; PID tuning; PID algorithm; Proportional integral derivative; PI controller; PD controller; PID control; PI Controller; Pi controller; Pidc; PID Controller; Proportional–integral–derivative controller; P.I.D. control; Droop (control); Proportional-integral-derivative controller; PID feed back controller; PID feedback controller; Three term controller; Steady-state error

строительное дело

ПИД-регулятор, пропорционально-интегральный (изодромный) регулятор с предварением

interrupt line         
  • thumb
  • Interrupt sources and processor handling
SIGNAL TO THE PROCESSOR EMITTED BY HARDWARE OR SOFTWARE INDICATING AN EVENT THAT NEEDS IMMEDIATE ATTENTION
Hardware interrupt; Interrupts; Software interrupt; Software Interrupt; Spurious Interrupt; Interrupt mask; Maskable interrupt; Masked interrupt; Level triggered interrupt; Edge triggered interrupt; Maskable interrupts; Interupt; Spurious interrupt; Trap (computing); Fault (computing); Interrupt line; Maskable Interrupt; Kernel trap; Interrupted; Interrupting; Interrupt handling; OS Trap; Shared interrupt; Interrupt (computing); IRQ affinity; Receive packet steering; Receive flow steering; Interrupt mechanism; Computer interrupt; Computer Interrupt

общая лексика

линия прерывания

проводник на печатной плате для передачи сигнала прерывания

Смотрите также

hardware interrupt; interrupt; interrupt controller

interrupt         
  • thumb
  • Interrupt sources and processor handling
SIGNAL TO THE PROCESSOR EMITTED BY HARDWARE OR SOFTWARE INDICATING AN EVENT THAT NEEDS IMMEDIATE ATTENTION
Hardware interrupt; Interrupts; Software interrupt; Software Interrupt; Spurious Interrupt; Interrupt mask; Maskable interrupt; Masked interrupt; Level triggered interrupt; Edge triggered interrupt; Maskable interrupts; Interupt; Spurious interrupt; Trap (computing); Fault (computing); Interrupt line; Maskable Interrupt; Kernel trap; Interrupted; Interrupting; Interrupt handling; OS Trap; Shared interrupt; Interrupt (computing); IRQ affinity; Receive packet steering; Receive flow steering; Interrupt mechanism; Computer interrupt; Computer Interrupt
Timer is interrupted. - Отсчет времени таймером прерывается.
three term controller         
  • Showing the evolution of analog control loop signaling from the pneumatic to the electronic eras
  • Response of PV to step change of SP vs time, for three values of ''K''<sub>d</sub> (''K''<sub>p</sub> and ''K''<sub>i</sub> held constant)
  • Response of PV to step change of SP vs time, for three values of ''K''<sub>i</sub> (''K''<sub>p</sub> and ''K''<sub>d</sub> held constant)
  • Proportional control using nozzle and flapper high gain amplifier and negative feedback
  • Effects of varying PID parameters (K<sub>p</sub>,K<sub>i</sub>,K<sub>d</sub>) on the step response of a system
  • A [[block diagram]] of a PID controller in a feedback loop. ''r''(''t'') is the desired process value or setpoint (SP), and ''y''(''t'') is the measured process value (PV).
  • PID with derivative filtering
  • PID without derivative filtering
  • Response of PV to step change of SP vs time, for three values of ''K''<sub>p</sub> (''K''<sub>i</sub> and ''K''<sub>d</sub> held constant)
  • Basic block of a PI controller
  • alt=
  • Early PID theory was developed by observing the actions of [[helmsmen]] in keeping a vessel on course in the face of varying influences such as wind and sea state.
  • Current loops used for sensing and control signals. A modern electronic "smart" valve positioner is shown, which will incorporate its own PID controller.
CONTROL LOOP MECHANISM USED IN CONTROL ENGINEERING
PID loop; Proportional-Integral-Derivative controller; PID tuning; PID algorithm; Proportional integral derivative; PI controller; PD controller; PID control; PI Controller; Pi controller; Pidc; PID Controller; Proportional–integral–derivative controller; P.I.D. control; Droop (control); Proportional-integral-derivative controller; PID feed back controller; PID feedback controller; Three term controller; Steady-state error
ПИД-регулятор, пропорционально-интегральный (изодромный) регулятор с предварением
software interrupt         
  • thumb
  • Interrupt sources and processor handling
SIGNAL TO THE PROCESSOR EMITTED BY HARDWARE OR SOFTWARE INDICATING AN EVENT THAT NEEDS IMMEDIATE ATTENTION
Hardware interrupt; Interrupts; Software interrupt; Software Interrupt; Spurious Interrupt; Interrupt mask; Maskable interrupt; Masked interrupt; Level triggered interrupt; Edge triggered interrupt; Maskable interrupts; Interupt; Spurious interrupt; Trap (computing); Fault (computing); Interrupt line; Maskable Interrupt; Kernel trap; Interrupted; Interrupting; Interrupt handling; OS Trap; Shared interrupt; Interrupt (computing); IRQ affinity; Receive packet steering; Receive flow steering; Interrupt mechanism; Computer interrupt; Computer Interrupt

общая лексика

программное прерывание

прерывание, вызванное исполнением специальной машинной команды для передачи управления подпрограмме обработки прерывания в ОС или BIOS. Программные прерывания широко используются, в отладчиках

Смотрите также

debugger; hardware interrupt; interrupt list

Определение

Programmable Interrupt Controller
<integrated circuit> PIC A special-purpose {integrated circuit} that functions as an overall manager in an interrupt driven system. It accepts requests from the peripheral equipment, determines which of the incoming requests is of the highest priority, ascertains whether the incoming request has a higher priority value than the level currently being serviced, and issues an interrupt to the CPU based on this determination. PICs typically have eight interrupt lines, and two PICs are often cascaded to provide 15 available interrupt lines. See also: Advanced Programmable Interrupt Controller. (2003-03-18)
Показать больше определений

Википедия

Programmable interrupt controller

In computing, a programmable interrupt controller (PIC) is an integrated circuit that helps a microprocessor (or CPU) handle interrupt requests (IRQ) coming from multiple different sources (like external I/O devices) which may occur simultaneously. It helps prioritize IRQs so that the CPU switches execution to the most appropriate interrupt handler (ISR) after the PIC assesses the IRQ's relative priorities. Common modes of interrupt priority include hard priorities, rotating priorities, and cascading priorities. PICs often allow mapping input to outputs in a configurable way. On the PC architecture PIC are typically embedded into a southbridge chip whose internal architecture is defined by the chipset vendor's standards.

https://en.wikipedia.org/wiki/Programmable interrupt controller
Как переводится interrupt controller на Русский язык
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